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anycap ? 100 ma low dropout linear regulator adp3309 rev. c information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006 analog devices, inc. all rights reserved. features 1.2% accuracy over line and load regulations @ 25c ultralow dropout voltage: 120 mv typical @ 100 ma requires only c out = 0.47 f for stability anycap ldos are stable with all types of capacitors (including mlcc) current and thermal limiting low noise low shutdown current: 1 a 2.8 v to 12 v supply range ?20c to +85c ambient temperature range several fixed voltage options ultrasmall 5-lead sot-23 package excellent line and load regulations applications cellular telephones notebook, palmtop computers battery-powered systems pcmcia regulator bar code scanners camcorders, cameras functional block diagram q1 q2 thermal protection driver adp3309 g m cc bandgap ref gnd r1 r2 out in err/n c sd 00141-001 figure 1. general description the adp3309 is a member of the adp330x family of precision low dropout anycap voltage regulators. it is pin-for-pin and functionally compatible with nationals lp2981, but offers performance advantages. the adp3309 stands out from conventional ldos with a novel architecture and an enhanced process. its patented design requires only a 0.47 f output capacitor for stability. this device is stable with any type of capacitor regardless of its equivalent series resistance (esr) value, including ceramic types for space restricted applications. the adp3309 achieves 1.2% accuracy at room temperature and 2.2% overall accuracy over temperature, line, and load regulations. the dropout voltage of the adp3309 is only 120 mv (typical) at 100 ma. this device also includes a current limit and a shutdown feature. in shutdown mode, the ground current is reduced to ~1 a. the adp3309 operates with a wide input voltage range from 2.8 v to 12 v and delivers a load current in excess of 100 ma. the adp3309 anycap ldo offers a wide range of output voltages. + ? + ? adp3309-3.3 in out gnd err/nc sd on off c2 0.47f c1 0.47f v in v out = 3.3v 4 5 3 2 1 00141-002 figure 2. typical application circuit
adp3309 rev. c | page 2 of 12 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 4 esd caution .................................................................................. 4 pin configuration and function descriptions ............................. 5 typical performance characteristics ............................................. 6 theory of operation ........................................................................ 9 application information ................................................................ 10 capacitor selection: anycap .................................................... 10 thermal overload protection .................................................. 10 calculating junction temperature ........................................... 10 printed circuit board layout consideration ......................... 10 shutdown mode ......................................................................... 10 error flag dropout detector .................................................... 10 application circuits ....................................................................... 11 crossover switch ........................................................................ 11 higher output current ............................................................. 11 constant dropout post regulator ............................................ 11 outline dimensions ....................................................................... 12 ordering guide .......................................................................... 12 revision history 12/06rev. b to rev. c change to table 1 ............................................................................. 3 updated outline dimensions ....................................................... 12 changes to the ordering guide.................................................... 12 7/04rev. a to rev. b. changes to the ordering guide...................................................... 3 updated outline dimensions ......................................................... 8 12/00rev. 0 to rev. a 9/98revision 0: initial version
adp3309 rev. c | page 3 of 12 specifications @ t a = ?20c to +85c, v in = 7 v, c in = 0.47 f, c out = 0.47 f, unless otherwise noted. 1 the following specifications apply to all voltage options. table 1. parameter symbol conditions min typ max unit output voltage accuracy v out v in = v outnom + 0.3 v to 12 v, ?1.2 +1.2 % i l = 0.1 ma to 100 ma, t a = 25c v in = v outnom + 0.3 v to 12 v, ?2.2 +2.2 % i l = 0.1 ma to 100 ma line regulation in out v v v in = v outnom + 0.3 v to 12 v, t a = 25c 0.02 mv/v load regulation l out i v i l = 0.1 ma to 100 ma, t a = 25c 0.06 mv/ma ground current i gnd i l = 100 ma 0.8 2.0 ma i l = 0.1 ma 0.19 0.3 ma ground current in dropout i gnd v in = 2.4 v, i l = 0.1 ma 0.9 1.7 ma dropout voltage v drop v out = 98% of v outnom i l = 100 ma 0.12 0.25 v i l = 10 ma 0.025 0.07 v i l = 1 ma 0.004 0.015 v shutdown threshold v thsd on 2.0 v off 0.3 v shutdown pin input current i sdin 0 < v sd 5 v 1 a 5 < v sd 12 v @ v in = 12 v 9 a ground current in shutdown mode i q v sd = 0 v, v in = 12 v, t a = 25c 0.005 1 a v sd = 0 v, v in = 12 v, t a = 85c 0.01 3 a output current in shutdown mode i osd t a = 25c @ v in = 12 v 2 a t a = 85c @ v in = 12 v 4 a error pin output leakage i el v eo = 5 v 13 a error pin output low voltage v eol i sink = 400 a 0.12 0.3 v peak load current i ldpk v in = v outnom + 1 v, t a = 25c 150 ma output noise @ 5 v input v noise f = 10 hz to 100 khz 100 v rms 1 ambient temperature of 85c corresponds to a junction temp erature of 125c under typical full load test conditions.
adp3309 rev. c | page 4 of 12 absolute maximum ratings table 2. parameter rating input supply voltage ?0.3 v to +16 v shutdown input voltage ?0.3 v to +16 v power dissipation internally limited operating ambient temperature range ?55c to +125c operating junction temperature range ?55c to +125c ja 190c/w jc 92c/w storage temperature range ?65c to +150c lead temperature (soldering 10 sec) 300c vapor phase (60 sec) 215c infrared (15 sec) 220c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
adp3309 rev. c | page 5 of 12 pin configuration and fu nction descriptions nc = no connect in 1 sd 3 gnd 2 out 5 err/nc 3 adp3309 top view (not to scale) 00141-003 figure 3. pin configuration table 3. pin function descriptions pin no. mnemonic description 1 in regulator input. 2 gnd ground pin. 3 sd active low shutdown pin. connect to ground to disable the regulator output. when shutdown is not used, this pin should be connected to the input pin. 4 err /nc open collector. output that goes low to indicate the output is about to go out of regulation. this pin can be left open. (nc = no connect). 5 out output of the regulator. fixed 2.5 v, 2.7 v, 2.85 v, 2.9 v, 3. 0 v, 3.3 v, or 3.6 v output voltage. bypass to ground with a 0.47 f or larger capacitor.
adp3309 rev. c | page 6 of 12 typical performance characteristics i l = 0ma i l = 10ma i l = 50ma i l = 100ma v out = 3.3v 3.302 3.301 3.300 3.299 3.298 3.297 3.296 3.295 3.3 4 5 6 7 8 9 10 11 12 13 14 output voltage (v) input voltage (v) 00141-004 figure 4. line regulation: output voltage vs. supply voltage 0 1020 30405060708090100 3.302 3.301 3.300 3.299 3.298 3.297 3.296 3.295 output voltage (v) v out = 3.3v v in = 7v output load (ma) 00141-005 figure 5. output voltage vs. load current 1150 900 650 400 150 0 0 1.2 2.4 3.6 4.8 6.0 7.2 8.4 9.6 10.8 12.0 input voltage (v) ground current (a) v out = 3.3v i l = 0ma 00141-006 figure 6. quiescent current vs. supply voltage 900 750 600 450 300 150 0 25 50 75 100 i l = 0 to 100ma output load (ma) ground current (a) 00141-007 figure 7. quiescent current vs. load current 0.2 0.1 0 ?0.1 ?0.2 ?0.3 ?0.4 ?45 ?25 ?5 15 35 55 75 95 115 135 i l = 0ma i l = 50ma i l = 100ma temperature (c) output voltage (%) 00141-008 figure 8. output voltage variation % vs. temperature 1250 1000 750 500 250 0 ?25 ?5 15 35 55 75 95 115 135 i l = 0ma i l = 100ma v in = 7v temperature (c) ground current (a) 00141-009 figure 9. quiescent current vs. temperature
adp3309 rev. c | page 7 of 12 0 0 120 96 72 48 24 0 02 55 07 51 output load (ma) input/output voltage (mv) 00141-010 figure 10. dropout voltage vs. output current 5 4 3 2 1 0 01 2343210 v out = 3.3v r l = 33 ? input voltage (v) input/output voltage (v) 00141-011 figure 11. power-up/power-down 8 7 6 5 4 3 2 0 0 20 40 60 80 100 120 140 160 180 200 1 v in v out v sd = v in c l = 0.47f r l = 33 ? v out = 3.3v time (s) input/output voltage (v) 00141-012 figure 12. power-up overshoot 3.32 3.31 3.29 3.28 3.30 7.50 7.00 0 40 80 120 160 200 240 280 320 360 400 r l = 33 ? c l = 0.47f v out = 3.3v v in time (s) volts 00141-013 figure 13. line transient response 3.32 3.31 3.30 3.29 3.28 7.50 7.00 0 20 40 60 80 100 120 140 160 180 200 v out = 3.3v r l = 3.3k ? c l = 0.47f v in time (s) volts 00141-014 figure 14. line transient response 3.32 3.31 3.30 3.29 3.28 100 10 0 100 200 300 400 500 v out = 3.3v c l = 0.47f i out time (s) volts ma 00141-015 figure 15. load transient
adp3309 rev. c | page 8 of 12 3.32 3.31 3.30 3.29 3.28 100 10 0 100 200 300 400 500 v out = 3.3v c l = 4.7f i out time (s) volts ma 00141-016 figure 16. load transient 300 200 100 0 4 2 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v out i out v out = 3.3v time (seconds) volts ma 00141-017 figure 17. short-circuit current 4 3 2 1 0 0 3 0 20 40 60 80 100 c l = 0.47f c l = 4.7f v out v out = 3.3v r l = 33 ? 3.3v 3v v sd time (s) volts 00141-018 figure 18. turn-on 4 3 2 1 0 3 0 01 02 03 04 05 0 v out = 3.3v r l = 33 ? c l = 0.47f 3.3v v sd time (s) volts 00141-019 figure 19. turn-off ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 10 100 1k 10k 100k 1m 10m 0 ?10 ?20 v out = 3.3v a. 0.47f, r l = 33k ? b. 0.47f, r l = 33 ? c. 10f, r l = 33k ? d. 10f, r l = 33 ? a b c d frequency (hz) ripple rejection (db) 00141-020 b d a c figure 20. power su pply ripple rejection 10 1 0.1 0.01 100 1k 10k 100k frequency (hz) voltage noise spectral density (v/ hz) 00141-021 v out = 3.3v, c l = 0.47f i l = 1ma figure 21. output noise density
adp3309 rev. c | page 9 of 12 theory of operation the adp3309 anycap ldo uses a single control loop for regulation and reference functions. the output voltage is sensed by a resistive voltage divider consisting of r1 and r2, which is varied to provide the available output voltage option. feedback is taken from this network by way of a series diode (d1) and a second resistor divider (r3 and r4) to the input of an amplifier. q1 adp3309 g m gnd r1 r2 r load c load (a) output r3 d1 ptat v os attenuation (v bandgap /v out ) r4 ptat current compensation capacitor noninverting wideband driver input 00141-022 figure 22. functional block diagram a very high gain error amplifier is used to control this loop. the amplifier is constructed in such a way that at equilibrium, it produces a large, temperature proportional input offset voltage that is repeatable and very well controlled. the temperature proportional offset voltage is combined with the complementary diode voltage to form a virtual band gap voltage, implicit in the network, although it never appears explicitly in the circuit. ultimately, this patented design makes it possible to control the loop with only one amplifier. this technique also improves the noise characteristics of the amplifier by providing more flexibility on the trade-off of noise sources that leads to a low noise design. the r1, r2 divider is chosen in the same ratio as the band gap voltage to the output voltage. although the r1, r2 resistor divider is loaded by the diode (d1), and a second divider consisting of r3 and r4, the values can be chosen to produce a temperature stable output. the patented amplifier controls a new and unique noninverting driver that drives the pass transistor (q1). the use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole splitting arrangement to achieve reduced sensitivity to the value, type, and esr of the load capacitance. most ldos place very strict requirements on the range of esr values for the output capacitor because they are difficult to stabilize due to the uncertainty of load capacitance and resistance. moreover, the esr value, required to keep conventional ldos stable, changes depending on load and temperature. these esr limitations make designing with ldos more difficult because of their unclear specifications and extreme variations over temperature. this is no longer true with the adp3309 anycap ldo. it can be used with virtually any capacitor, with no constraint on the minimum esr. this innovative design allows the circuit to be stable with just a small 0.47 f capacitor on the output. additional advantages of the design scheme include superior line noise rejection and very high regulator gain, which leads to excellent line, and load regulation. an impressive 2.2% accuracy is guaranteed over line, load, and temperature. additional features of the circuit include current limit and thermal shutdown. compared to the standard solutions that give warning after the output has lost regulation, the adp3309 provides improved system performance by enabling the err pin to give warning before the device loses regulation. as the chips temperature rises above 165c, the circuit activates a soft thermal shutdown, indicated by a signal low on the err pin, to reduce the current to a safe level.
adp3309 rev. c | page 10 of 12 application information capacitor selection: anycap output capacitors: as with any micropower device, output transient response is a function of the output capacitance. the adp3309 is stable with a wide range of capacitor values, types, and esr (anycap). a capacitor as low as 0.47 f is all that is needed for stability. however, larger capacitors can be used if high output current surges are anticipated. the adp3309 is stable with extremely low esr capacitors (esr 0), such as multilayer ceramic capacitors (mlcc) or oscon. input bypass capacitor: an input bypass capacitor is not required. however, for applications where the input source is high impedance or far from the input pin, a bypass capacitor is recommended. connecting a 0.47 f capacitor from the input pin (pin 1) to ground reduces the circuits sensitivity to pc board layout. if a bigger output capacitor is used, the input capacitor must be 1 f minimum. thermal overload protection the adp3309 is protected against damage due to excessive power dissipation by its thermal overload protection circuit, which limits the die temperature to a maximum of 165c. under extreme conditions (that is, high ambient temperature and power dissipation) where die temperature starts to rise above 165c, the output current is reduced until the die temperature has dropped to a safe level. the output current is restored when the die temperature is reduced. current and thermal limit protections are intended to protect the device against accidental overload conditions. for normal operation, device power dissipation should be externally limited so that junction temperatures do not exceed 125c. calculating junction temperature device power dissipation is calculated as follows: p d = (v in C v out ) i load + (v in ) i gnd where: i load is the load current. i gnd is the ground current. v in is the input voltage. v out is the output voltage. assuming i load = 100 ma, i gnd = 2 ma, v in = 5.0 v, and v out = 3.3 v, device power dissipation is p d = (5.0 ? 3.3) 100 ma + 5.0 2 ma = 180 mw t = t j C t a = p d ja = 0.18 190 = 34.2c with a maximum junction temperature of 125c, this yields a maximum ambient temperature of ~90c. printed circuit board layout consideration surface-mount components rely on the conductive traces or pads to transfer heat away from the device. appropriate pc board layout techniques should be used to remove heat from the immediate vicinity of the package. the following general guidelines will be helpful when designing a board layout: 1. pc board traces with larger cross section areas remove more heat. for optimum results, use pc boards with thicker copper and/or wider traces. 2. increase the surface area exposed to open air so heat can be removed by convection or forced air flow. 3. do not use solder mask or silk screen on the heat dissipating traces because it increases the junction to ambient thermal resistance of the package. shutdown mode applying a ttl high signal to the shutdown pin or tying it to the input pin turns the output on. pulling the shutdown pin down to a ttl low signal or tying it to ground turns the output off. in shutdown mode, quiescent current is reduced to less than 1 a. error flag dropout detector the adp3309 maintains its output voltage over a wide range of load, input voltage, and temperature conditions. if the output is about to lose regulation, for example, by reducing the supply voltage below the combined regulated output and dropout voltages, the err pin will be activated. the err output is an open collector that will be driven low. once set, the err or flags hysteresis keeps the output low until a small margin of operating range is restored either by raising the supply voltage or reducing the load.
adp3309 rev. c | page 11 of 12 application circuits crossover switch the circuit in figure 23 shows that two adp3309s can be used to form a mixed supply voltage system. the output switches between two different levels selected by an external digital input. output voltages can be any combination of voltages from the ordering guide of the data sheet. + + adp3309-2.7 adp3309-3.3 in out sd in out sd gnd gnd v in = 4v to 12v 4v 0v output select c1 1f c2 0.47f v out = 2.7v/3.3v 00141-023 figure 23. crossover switch higher output current the adp3309 can source up to 100 ma without any heat sink or pass transistor. if higher current is needed, an appropriate pass transistor can be used, as in figure 24 , to increase the output current to 1 a. + adp3309-3.3 in out sd gnd v in = 4v to 8v c1 47f c2 10f v out = 3.3v @ 1a err r1 50 ? mje253* *aavid531002 heat sink is used 00141-024 figure 24. higher output current linear regulator constant dropout post regulator the circuit in figure 25 provides high precision with low dropout for any regulated output voltage. it significantly reduces the ripple from a switching regulator while providing a constant dropout voltage, which limits the power dissipation of the ldo to 30 mw. the adp3000 used in this circuit is a switching regulator in the step-up configuration. + adp3309-3.3 in out sd gnd v in = 2.5v to 3.5v c3 2.2f v out = 3.3v @ 100ma r1 120 ? c1 100f 10v l1 6.8f d1 1n5817 adp3000-adj i lim v in sw1 fb sw2 gnd c2 100f 10v q1 2n3906 r2 30.1k ? 1% r3 124k ? 1% q2 2n3906 r4 274k ? 00141-025 figure 25. constant dropout post regulator
adp3309 rev. c | page 12 of 12 outline dimensions pin 1 1.60 bsc 2.80 bsc 1.90 bsc 0.95 bsc 5 123 4 0.22 0.08 10 5 0 0.50 0.30 0.15 max seating plane 1.45 max 1.30 1.15 0.90 2.90 bsc 0.60 0.45 0.30 compliant to jedec standards mo-178-aa figure 26. 5-lead small outline transistor package [sot-23] (rj-5) dimensions shown in millimeters ordering guide model temperature range voltage output pack age description package option branding adp3309art-2.5-rl ?20c to +85c 2.5 v 5-lead sot-23 rj-5 lde adp3309art-2.5-rl7 ?20c to +85c 2.5 v 5-lead sot-23 rj-5 lde adp3309artz-2.5rl7 1 ?20c to +85c 2.5 v 5-lead sot-23 rj-5 lde# adp3309art-2.7-rl ?20c to +85c 2.7 v 5-lead sot-23 rj-5 dnc adp3309art-2.7-rl7 ?20c to +85c 2.7 v 5-lead sot-23 rj-5 dnc adp3309artz-2.7-r7 1 ?20c to +85c 2.7 v 5-lead sot-23 rj-5 l1p adp3309art-2.85-r7 ?20c to +85c 2.85 v 5-lead sot-23 rj-5 dvc adp3309art-2.85-rl ?20c to +85c 2.85 v 5-lead sot-23 rj-5 dvc adp3309artz-2.85r7 1 ?20c to +85c 2.85 v 5-lead sot-23 rj-5 l1r adp3309art-2.9-rl ?20c to +85c 2.9 v 5-lead sot-23 rj-5 dwc adp3309art-2.9-rl7 ?20c to +85c 2.9 v 5-lead sot-23 rj-5 dwc adp3309artz-2.9-r7 1 ?20c to +85c 2.9 v 5-lead sot-23 rj-5 l1s adp3309art-3-reel ?20c to +85c 3.0 v 5-lead sot-23 rj-5 dpc adp3309art-3-reel7 ?20c to +85c 3.0 v 5-lead sot-23 rj-5 dpc adp3309artz-3reel7 1 ?20c to +85c 3.0 v 5-lead sot-23 rj-5 dpc# adp3309art-3.3-rl ?20c to +85c 3.3 v 5-lead sot-23 rj-5 drc adp3309art-3.3-rl7 ?20c to +85c 3.3 v 5-lead sot-23 rj-5 drc adp3309artz-3.3-r7 1 ?20c to +85c 3.3 v 5-lead sot-23 rj-5 l1q adp3309art-3.6-rl ?20c to +85c 3.6 v 5-lead sot-23 rj-5 dtc adp3309art-3.6-rl7 ?20c to +85c 3.6 v 5-lead sot-23 rj-5 dtc adp3309artz-3.6-r7 1 ?20c to +85c 3.6 v 5-lead sot-23 rj-5 l1t 1 z = pb-free part, # denotes lead-free product may be top or bottom marked. ?2006 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. c00141-0-12/06(c)

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